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No exploitation reported

CVE-2020-10255

No exploitation reported by the sources we read.

  • Published2020-03-10
  • WeaknessCWE-20

Am I affected?

With a domain, we read the version its public headers and pages expose. A distribution build can carry the fix under an older number.

Description

Modern DRAM chips (DDR4 and LPDDR4 after 2015) are affected by a vulnerability in deployment of internal mitigations against RowHammer attacks known as Target Row Refresh (TRR), aka the TRRespass issue. To exploit this vulnerability, the attacker needs to create certain access patterns to trigger bit flips on affected memory modules, aka a Many-sided RowHammer attack. This means that, even when chips advertised as RowHammer-free are used, attackers may still be able to conduct privilege-escalation attacks against the kernel, conduct privilege-escalation attacks against the Sudo binary, and achieve cross-tenant virtual-machine access by corrupting RSA keys. The issue affects chips produced by SK Hynix, Micron, and Samsung. NOTE: tracking DRAM supply-chain issues is not straightforward because a single product model from a single vendor may use DRAM chips from different manufacturers.

Timeline

dates in UTC
  1. 2020-03-1016:15CVE publishedNVD

Observed activity

isMalicious corpus · updated 2026-10-23 18:48 UTC
Indicators tagged with this CVE, per day0 indicators over 7 days
Block these indicators
  • Firewall list (EDL, text): https://api.ismalicious.com/edl/cve/CVE-2020-10255?format=txt
  • CSV export: https://api.ismalicious.com/edl/cve/CVE-2020-10255?format=csv
  • TAXII collection of exploited CVEs
  • The EDL and CSV take an API key on the Pro plan.

Versions per branch

NVD
Micron ddr4 sdram
BranchAffectedFixed in
—all versionsno fix published
Micron lpddr4
BranchAffectedFixed in
—all versionsno fix published
Samsung ddr4
BranchAffectedFixed in
—all versionsno fix published

3 more products in the sources.

as publishedRanges as NVD and OSV publish them; a distribution’s build can be fixed under an older number.

Fix

No fix published by the sources we read yet. NVD record

Detection

Nuclei template
none so far
ProjectDiscovery
Exploit-DB
no entry
Exploit-DB
Proof-of-concept repositories
none listed
PoC-in-GitHub

Sources

  • NVDCVSS 3.19read 2026-10-23
  • NVDCVSS 2.09.3read 2026-10-23
  • NVDweakness (CWE)CWE-20read 2026-10-23
  • FIRST EPSSEPSS score2.7 %2026-10-22

Technical details

CVSS v3 Vector
CVSS:3.1/AV:N/AC:H/PR:N/UI:N/S:C/C:H/I:H/A:H
Published
2020-03-10
Last Modified
2026-06-17
NVD status
Modified

Frequently asked questions

What is CVE-2020-10255?

Modern DRAM chips (DDR4 and LPDDR4 after 2015) are affected by a vulnerability in deployment of internal mitigations against RowHammer attacks known as Target Row Refresh (TRR), aka the TRRespass issue. To exploit this vulnerability, the attacker needs to create certain access patterns to trigger bit flips on affected memory modules, aka a Many-sided RowHammer attack. This means that, even when chips advertised as RowHammer-free are used, attackers may still be able to conduct privilege-escalation attacks against the kernel, conduct privilege-escalation attacks against the Sudo binary, and achieve cross-tenant virtual-machine access by corrupting RSA keys. The issue affects chips produced by SK Hynix, Micron, and Samsung. NOTE: tracking DRAM supply-chain issues is not straightforward because a single product model from a single vendor may use DRAM chips from different manufacturers.

Is CVE-2020-10255 actively exploited?

Active exploitation of CVE-2020-10255 has not been confirmed. Its EPSS score was 2.7% on 2026-10-22, the estimated probability of exploitation in the next 30 days.

What is the CVSS score for CVE-2020-10255?

CVE-2020-10255 has a CVSS v3 base score of 9 (CRITICAL severity), with vector string CVSS:3.1/AV:N/AC:H/PR:N/UI:N/S:C/C:H/I:H/A:H.

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